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Title: Writing Testbenches: Functional Verification of HDL Models, Second Edition by Janick Bergeron ISBN: 1-4020-7401-8 Publisher: Kluwer Academic Publishers Pub. Date: 01 February, 2003 Format: Hardcover Volumes: 1 List Price(USD): $120.00 |
Average Customer Rating: 4.25 (8 reviews)
Rating: 4
Summary: Perhaps he should say this is how to make a standard cell
Comment: In hardware development groups, the author points out that by 2000, from 60-80% of effort was in verification. But texts on VHDL rarely emphasise this. Instead, far more time is devoted to design. The creative focus is on the latter.
The author instead says that from project inception, one should strive to design for verification. All the way from netlists. He suggests how to construct self checking systems.
Surprisingly, initially, he nowhere discusses standard cells, and how you can use proven, tested standard cells in larger designs. But closer scrutiny of his arguments show that, implicitly, his techniques can be used to construct such cells, if they are not composed of smaller standard cells. It would have been nice if the index had an entry for standard cells, so that the reader could find this argument.
Rating: 4
Summary: Great content - can't wait for next edition
Comment: I loved the book and it provided much information I needed - in a convoluted manner. I'm sure that Janick will improve upon this in the next edition and provide examples we all can use.
Thank you for the book and it's content - To my knowledge 15 people I know have purchased it upon my recommendation.
Rating: 5
Summary: The First of Its Kind
Comment: I have been working with VHDL and Verilog for years but this
is the first book that treats the subject of testbenches seriously and comprehensively in both language.
I collect books and this is one of the best written books in my shelf. Highly recommended
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Title: Assertion-Based Design by Harry Foster, Adam Krolnik, David Lacey ISBN: 1402074980 Publisher: Kluwer Academic Publishers Pub. Date: 01 June, 2003 List Price(USD): $130.00 |
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Title: Reuse Methodology Manual for System-On-A-Chip Designs by Michael Keating, Pierre Bricaud, Russell John Rickford ISBN: 1402071418 Publisher: Kluwer Academic Publishers Pub. Date: June, 2002 List Price(USD): $115.00 |
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Title: Advanced Digital Design with the Verilog(TM) HDL by Michael D. Ciletti ISBN: 0130891614 Publisher: Prentice Hall Pub. Date: 13 August, 2002 List Price(USD): $117.00 |
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Title: Design Verification with e by Samir Palnitkar ISBN: 0131413090 Publisher: Prentice Hall PTR Pub. Date: 25 September, 2003 List Price(USD): $89.00 |
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Title: Principles of Verifiable RTL Design Second Edition - A Functional Coding Style Supporting Verification Processes in Verilog by Lionel Bening, Harry Foster ISBN: 0792373685 Publisher: Kluwer Academic Publishers Pub. Date: 01 May, 2001 List Price(USD): $153.00 |
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