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Verilog HDL Synthesis, A Practical Primer

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Title: Verilog HDL Synthesis, A Practical Primer
by Jayaram Bhasker, J. Bhasker
ISBN: 0-9650391-5-3
Publisher: Star Galaxy Pr
Pub. Date: October, 1998
Format: Paperback
List Price(USD): $59.95
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Average Customer Rating: 4.8 (5 reviews)

Customer Reviews

Rating: 4
Summary: This is a very good (and short) book on Verilog synthesis
Comment: The author does a very good job of covering synthesizable Verilog. The numerous examples provide the reader with solid Verilog coding style guidelines. In addition, the author's discussion of blocking and non-blocking assignment statements for synthesizing combinational and sequential logic is very clear and concise. The only complaint I have about the book is its weak treatment of parameterizable design for synthesis. Despite the drawback, this is a very good reference and coding style guide for writing synthesizable Verilog.

Rating: 5
Summary: A Synthesis Book...At Last
Comment: I write this review for two books: Verilog HDL Primer and Verilog HDL "SYNTEHSIS" Primer. Both books are primers, but serve the title very well. The books are straight to the point and do not "ramble" with grammar (ie. he tells you what it is you need to know and does not attempt to distract you). This is the book I use when I look for Verilog contructs for synthesis. The examples resemble closer to real world application including techniques in modeling digital systems. No comparison to the "other" Verilog text (Palnitkar). These two books complement one another. Another good verilog book is by Sternheim, but it is relatively expensive and hard to get.

Rating: 5
Summary: Best Verilog Synthsis book
Comment: This is the best book about the Verilog Synthesis. The book is very practical, and I immediately applied many examples into my work....

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